Substrates are used in integrated circuit packages, peripheral expansion cards, motherboards and other printed wiring boards that are used to form electronic circuit packages. Conductive traces formed on the substrate electrically interconnect various electrical components that are attached to the substrate.
Integrated circuit packages, for example, usually include a carrier substrate used to attach a semiconductor die containing an integrated circuit. The carrier substrate may also contain solder balls or pins which are used to attach the integrated circuit package to an external circuit such as a peripheral expansion card or a printed circuit board.
A substrate usually includes a core on which one or more routing layers for routing electrical signals are formed. Typically, a passive circuit of conductive traces is initially formed on one or both surfaces of the core. These conductive traces are often etched using thin-film metals or copper foils. Thereafter, one or more additional routing layers are built upon the core (so called “buildup layers”). A buildup layer typically includes a dielectric layer and a conductive layer. The dielectric layer is typically formed by laminating dielectric material over a formed routing layer or the core. The conductive layer is formed on the dielectric layer. The dielectric material in the buildup layer insulates the conductive layer, from conductive traces underneath the dielectric layer. Holes may be formed at suitable points in the dielectric layer to interconnect parts of the conductive layer on the dielectric of one buildup layer, to traces underneath the dielectric material. Multiple such buildup layers can be formed on one another.
Typically, an equal number of buildup layers are formed on each side (top and bottom sides) of the core. Conductive tunnels or perforations through the core, called plated through-holes (PTH), are often used to interconnect traces on the top buildup layers to traces at the bottom buildup layers of the substrate core.
Forming an equal number of buildup layers on each side of the core is often inefficient as it may lead to the formation of more buildup layers than may be required. For example, if an odd number of buildup layers (e.g., three layers) are sufficient, then having an equal number of buildup layers on top and at the bottom of the core (e.g., two on each side) introduces a fourth, largely redundant layer. This is undesirable as it adds to the material and manufacturing cost of the package.
Known methods for reducing the number of buildup layers include using coreless substrates. However, this increases the risk of warping and thus often requires the use of stiffeners which unfortunately increases manufacturing costs.
Single-sided substrates, that have buildup layers formed only on one side, are also known. However, such substrates are also susceptible to warping. Moreover, in a single-sided substrate, electric components, such as an integrated circuit die, are typically attached to the same side of the substrate (containing the buildup layers) which limits the area available to attach the die.
Although it is also known to manufacture substrates having an unequal number of buildup layers of each side of a core, known methods often lead to undesirable properties such as over-desmearing of the dielectric layer in some of the buildup layers, and warping.
Accordingly, there is a need for integrated circuit packages that make efficient use of buildup layers, while avoiding the aforementioned disadvantages.